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Paper:

TR16-119 | 1st August 2016 18:51

On the Limits of Gate Elimination

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TR16-119
Authors: Alexander Golovnev, Edward Hirsch, Alexander Knop, Alexander Kulikov
Publication: 1st August 2016 19:13
Downloads: 405
Keywords: 


Abstract:

Although a simple counting argument shows the existence of Boolean functions of exponential circuit complexity, proving superlinear circuit lower bounds for explicit functions seems to be out of reach of the current techniques. There has been a (very slow) progress in proving linear lower bounds with the latest record of $3\frac1{86}n-o(n)$. All known lower bounds are based on the so-called gate elimination technique. A typical gate elimination argument shows that it is possible to eliminate several gates from an optimal circuit by making one or several substitutions to the input variables and repeats this inductively. In this note we prove that this method cannot achieve linear bounds of $cn$ beyond a certain constant $c$, where $c$ depends only on the number of substitutions made at a single step of the induction.



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