Revision #3 Authors: Alexander Golovnev, Alexander Kulikov, Ryan Williams

Accepted on: 7th December 2020 21:00

Downloads: 27

Keywords:

The best known circuit lower bounds against unrestricted circuits remained around $3n$ for several decades. Moreover, the only known technique for proving lower bounds in this model, gate elimination, is inherently limited to proving lower bounds of less than $5n$. In this work, we suggest a first non-gate-elimination approach for obtaining circuit lower bounds. Namely, we prove that every (unbounded-depth) circuit of size $s$ can be expressed as an OR of $2^{s/3.9}$ $16$-CNFs. While this structural result does not immediately lead to new lower bounds, it suggests a new avenue of attack on them.

Our result complements the classical depth reduction result of Valiant which asserts that logarithmic-depth circuits of linear size can be computed by an OR of $2^{\varepsilon n}$ $n^{\delta}$-CNFs. It is known that no such graph-theoretic reduction can work for circuits of super-logarithmic depth. We overcome this limitation (for small circuits) by taking into account both the graph-theoretic and functional properties of circuits.

We show that qualitative improvements of the following pseudorandom constructions imply qualitative (from $3n$ to $\omega(n)$) improvement of size lower bounds for log-depth circuits via Valiant's reduction: dispersers for varieties, correlation with constant degree polynomials, matrix rigidity, and hardness for depth-$3$ circuits with constant bottom fan-in. On the other hand, now even modest quantitative improvements of the known constructions give elementary proofs of quantitatively stronger circuit lower bounds ($3.9n$ instead of $3n$).

Revision #2 Authors: Alexander Golovnev, Alexander Kulikov, Ryan Williams

Accepted on: 10th April 2019 18:10

Downloads: 564

Keywords:

The best known size lower bounds against unrestricted circuits have remained around $3n$ for several decades. Moreover, the only known technique for proving lower bounds in this model, gate elimination, is inherently limited to proving lower bounds of less than $5n$. In this work, we propose a non-gate-elimination approach for obtaining circuit lower bounds, via certain depth-three lower bounds. We prove that every (unbounded-depth) circuit of size $s$ can be expressed as an OR of $2^{s/3.9}$ $16$-CNFs. For DeMorgan formulas, the best known size lower bounds have been stuck at around $n^{3-o(1)}$ for decades. Under a plausible hypothesis about probabilistic polynomials, we show that $n^{4-\varepsilon}$-size DeMorgan formulas have $2^{n^{1-\Omega(\varepsilon)}}$-size depth-3 circuits which are approximate sums of $n^{1-\Omega(\varepsilon)}$-degree polynomials over $\F_2$. While these structural results do not immediately lead to new lower bounds, they do suggest new avenues of attack on these longstanding lower bound problems.

Our results complement the classical depth-$3$ reduction results of Valiant, which show that logarithmic-depth circuits of linear size can be computed by an OR of $2^{\varepsilon n}$ $n^{\delta}$-CNFs, and slightly stronger results for series-parallel circuits. It is known that no purely graph-theoretic reduction could yield interesting depth-3 circuits from circuits of super-logarithmic depth. We overcome this limitation (for small-size circuits) by taking into account both the graph-theoretic and functional properties of circuits and formulas.

We show that improvements of the following pseudorandom constructions imply super-linear circuit lower bounds for log-depth circuits via Valiant's reduction: dispersers for varieties, correlation with constant degree polynomials, matrix rigidity, and hardness for depth-$3$ circuits with constant bottom fan-in. On the other hand, our depth reductions show that even modest improvements of the known constructions give elementary proofs of improved (but still linear) circuit lower bounds.

Added a (conditional) depth reduction for DeMorgan formulas

Revision #1 Authors: Alexander Golovnev, Alexander Kulikov

Accepted on: 13th December 2018 23:17

Downloads: 767

Keywords:

The best known circuit lower bounds against unrestricted circuits remained around $3n$ for several decades. Moreover, the only known technique for proving lower bounds in this model, gate elimination, is inherently limited to proving lower bounds of less than $5n$. In this work, we suggest a first non-gate-elimination approach for obtaining circuit lower bounds. Namely, we prove that every (unbounded-depth) circuit of size $s$ can be expressed as an OR of $2^{s/3.9}$ $16$-CNFs. While this structural result does not immediately lead to new lower bounds, it suggests a new avenue of attack on them.

Our result complements the classical depth reduction result of Valiant which asserts that logarithmic-depth circuits of linear size can be computed by an OR of $2^{\varepsilon n}$ $n^{\delta}$-CNFs. It is known that no such graph-theoretic reduction can work for circuits of super-logarithmic depth. We overcome this limitation (for small circuits) by taking into account both the graph-theoretic and functional properties of circuits.

We show that qualitative improvements of the following pseudorandom constructions imply qualitative (from $3n$ to $\omega(n)$) improvement of size lower bounds for log-depth circuits via Valiant's reduction: dispersers for varieties, correlation with constant degree polynomials, matrix rigidity, and hardness for depth-$3$ circuits with constant bottom fan-in. On the other hand, now even modest quantitative improvements of the known constructions give elementary proofs of quantitatively stronger circuit lower bounds ($3.9n$ instead of $3n$).

TR18-192 Authors: Alexander Golovnev, Alexander Kulikov

Publication: 12th November 2018 18:34

Downloads: 599

Keywords:

The best known circuit lower bounds against unrestricted circuits remained around $3n$ for several decades. Moreover, the only known technique for proving lower bounds in this model, gate elimination, is inherently limited to proving lower bounds of less than $5n$. In this work, we suggest a first non-gate-elimination approach for obtaining circuit lower bounds. Namely, we prove that every (unbounded-depth) circuit of size $s$ can be expressed as an OR of $2^{s/3.9}$ $16$-CNFs. While this structural result does not immediately lead to new lower bounds, it suggests a new avenue of attack on them.

Our result complements the classical depth reduction result of Valiant which asserts that logarithmic-depth circuits of linear size can be computed by an OR of $2^{\varepsilon n}$ $n^{\delta}$-CNFs. It is known that no such graph-theoretic reduction can work for circuits of super-logarithmic depth. We overcome this limitation (for small circuits) by taking into account both the graph-theoretic and functional properties of circuits.

We show that qualitative improvements of the following pseudorandom constructions imply qualitative (from $3n$ to $\omega(n)$) improvement of size lower bounds for log-depth circuits via Valiant's reduction: dispersers for varieties, correlation with constant degree polynomials, matrix rigidity, and hardness for depth-$3$ circuits with constant bottom fan-in. On the other hand, now even modest quantitative improvements of the known constructions give elementary proofs of quantitatively stronger circuit lower bounds ($3.9n$ instead of $3n$).